This tutorial is intended to serve as complementary to a technical session presentation on thermal interface materials.

This tutorial will include the following topics:

• A categorization methodology for thermal interface materials (TIMs) that is standardized for the thermal materials industry,with a number of very recent TIM developments identified by type and category. There are thousands of TIM materials offered by manufacturers and resellers and understanding how the major categories are identified – and specific performance characteristics and intended function – is important to creating a short selection menu for evaluation.
• Identification of specific functional areas within the broad TIM range, followed by separating out polymers, graphitic, and metallic materials. Certain categories of TIMs are not appropriate for common application types and for semiconductor test, having been designed to meet specific functional requirements.
• Description of very recent developments in graphene-enhanced TIM types, hybrid liquid metal formulations, metallic pastes and gallium-containing materials, and phase-change metal alloys that are either currently in late-stage development or which have been released to production.
• Testing methods and specific practices, especially for newly-developed TIM types that have specific constraints on both testing practices and applications, will follow. Gallium-containing TIMs, for example, must be considered for testing and for application requirements with an understanding of this corrosive metal and containment, to prevent damage to joining copper and aluminum surfaces and components.
• Testing methodologies including ASTM D 5470-17 for through-plane thermal conductivity and thermal resistance; in-plane lateral testing methods; three-omega liquid, gel, and paste testing equipment and methods; and transient (structure function) methods. The use of standardized testing per ASTM D 5470-17 yields most consistent, accurate, and repeatable measurements. Transient test and thermal test vehicles (TTVs) are designed to produce in-situ test results that are closely matched to a specific package type, surface characteristics, and other non-standard conditions. Understanding the differences and the sequence of testing procedures is therefore important.
• Description of the use of thermal test vehicles (TTVs) for in-situ TIM testing for TIM0, TIM1, and TIM2.

Thermal interface materials are available from hundreds of vendors and in thousands of different P/Ns, creating a challenging test, evaluation, and selection procedure. This tutorial is intended to address these facets with an organized approach.

A relatively small number of TIM types are either designed specifically for semiconductor test or are directly applicable. for innovative thermal interface materials that are designed specifically for semiconductor test applications, or which are directly applicable.

This tutorial is intended to serve as complementary to a technical session presentation on thermal interface materials.

We’ll explore a brief history of the PCB or PWB (Printed Circuit/Wiring Board) industry in general and specifically concerning the ATE industry. We’ll see how pitch, layer count, overall thickness, and hole diameter, to name but a few of the most critical attributes, will impact the manufacturing (and co$t) of today’s test interface boards. We’ll examine the many options currently available for materials and how those options may be shrinking, right along with device pitch.

We’ll then move on to explain, in detail, the PWB manufacturing process; from raw materials through finished product. 

Last but certainly not least, we’ll discuss quality and performance characteristics you can demand of your supplier(s). Even with today’s boards becoming more crowded (with components) and pitch and pin counts driving attributes ever smaller, there are ways to verify and validate the quality of your interface boards with your suppliers. We’ll show you how, with samples of our data gathered over years of process development, characterization and verification.