![Image](https://www.testconx.org/premium/wp-content/uploads/2023/TestConXKorea2023_band_1500x500.jpg)
Incheon, South Korea - November 7, 2023
Central Park Hotel Songdo
193, Techno Park-ro, Yeonsu-gu
Incheon, Korea, 406-840
Tel. +82-32-310-5010~1
TestConX has, over the course of its twenty four-year history, established itself as the preeminent event for test consumables, test cell integration, and test operations. The program scope has expanded over these years from packaged semiconductor “final” test and burn-in to encompass all practical aspects of electronics testing including validation, advanced packaging testing, system level test, module test, and beyond to finished product test.
This year is our inaugural annual TestConX Korea event!
Don’t miss this opportunity to be part of TestConX as we connect a larger community of test professionals and to participate in this excellent event!
09:00
09:15
“์ธ๊ณต์ง๋ฅ(AI)์ ์ํ ๋ฐ๋์ฒด ํ ์คํธ์ ํ๋ช ”
Abstract - Biography (English)
The rapid advancement of Artificial Intelligence (AI) has emerged as a pivotal driving force in the semiconductor industry, fundamentally transforming the landscape of semiconductor testing. This study delves into the symbiotic relationship between AI and semiconductor testing, with a comprehensive analysis of various segments of semiconductors. Moreover, this research extends its purview to the global probe card market, accentuating region-specific insights for two key players: Korea and China.
In semiconductor testing, AI has evolved from an auxiliary tool to a central catalyst, significantly enhancing testing efficiency, accuracy, and speed. The memory segment, encompassing DRAM and flash memory, has reaped the rewards of AI-driven testing with remarkable defect detection and error prediction. Similarly, non-memory components like logic and analog devices have witnessed the infusion of AI algorithms for adaptive testing and anomaly detection, reducing production bottlenecks.
Another essential aspect of this project is the introduction of a new probe card taxonomy and re-segmentation of the Probe card market. This innovative classification promises to redefine industry standards, fostering a more coherent understanding of probe card functionalities and applications. While the global probe card market thrives, specific focus is directed towards Korea and China. These semiconductor powerhouses exhibit unique market dynamics, propelled by local demand, innovation, and strategic collaborations.
In summation, this study underscores the indispensable role of AI in propelling semiconductor testing towards unprecedented heights and global Probe card market update.
Panchami Phadke is a Market Research Analyst at TechInsights. Her primary focus is Test Connectivity Systems reports such as Probe Card, Sockets and Device Interface Boards. Part of her work focuses on the market analysis of semiconductor tests both in Memory and Non-memory markets.
She graduated from California State University, Channel Islands with a Master of Science majoring in Mathematics. She also has an MBA in Finance from Ramaiah Institute of Technology, Bengaluru. She has published a Master Thesis about using Markov Chain and Python to analyze and predict the Stock Market trend. Panchami has also published many academic papers in Indian Research Journal, SAGE Student Research Conference, etc. and presented at TestConX China 2022, TestConX 2023 at Mesa, Arizona and SW Test 2023 at Carlsbad, CA.
์ด๋ก - ์ ๊ธฐ (Korean)
์ธ๊ณต์ง๋ฅ(AI)์ ๊ธ์ํ ๋ฐ์ ์ ๋ฐ๋์ฒด ์ฐ์ ์ ํต์ฌ ๊ตฌ๋๋ ฅ์ผ๋ก ๋ถ์ํ์ฌ ๋ฐ๋์ฒด ํ ์คํธ์ ํ๊ฒฝ์ ๊ทผ๋ณธ์ ์ผ๋ก ๋ณํ์์ผฐ๋ค. ์ด ์ฐ๊ตฌ๋ AI์ ๋ฐ๋์ฒด ํ ์คํธ ๊ฐ์ ์์ ๊ด๊ณ๋ฅผ ๋ค๋ฃจ๋ฉด์ ๋ค์ํ ๋ฐ๋์ฒด ์ธ๊ทธ๋จผํธ์ ๋ํ ์ข ํฉ์ ์ธ ๋ถ์์ ์ ๊ณตํ๋ค. ๋ํ ์ด ์ฐ๊ตฌ๋ ๊ธ๋ก๋ฒ ํ๋ก๋ธ ์นด๋ ์์ฅ์ ์ดํด๋ณด๊ณ ํ๊ตญ๊ณผ ์ค๊ตญ์ด๋ผ๋ ๋ ์ฃผ์ ํ๋ ์ด์ด์ ๋ํ ํนํ๋ ์ง์ญ๋ณ ์ธ์ฌ์ดํธ๋ฅผ ๊ฐ์กฐํ๋ค.
[๋ฐ๋์ฒด ํ ์คํธ์์ AI๋ ๋ณด์กฐ ๋๊ตฌ์์ ํต์ฌ ์ด์ง์ ๋ก ์งํํ๋ฉฐ ํ ์คํธ ํจ์จ์ฑ, ์ ํ์ฑ ๋ฐ ์๋๋ฅผ ํฌ๊ฒ ํฅ์์์ผฐ๋ค. DRAM ๋ฐ ํ๋์ ๋ฉ๋ชจ๋ฆฌ๋ฅผ ํฌํจํ๋ ๋ฉ๋ชจ๋ฆฌ ์ธ๊ทธ๋จผํธ์์๋ ๋ฐ์ด๋ ๊ฒฐํจ ํ์ง ๋ฐ ์ค๋ฅ ์์ธก์ ํตํด AI ๊ธฐ๋ฐ ํ ์คํธ์ ์ด์ ์ ์ป์๋ค. ๋ง์ฐฌ๊ฐ์ง๋ก ๋ก์ง ๋ฐ ์๋ ๋ก๊ทธ ์ฅ์น์ ๊ฐ์ ๋น๋ฉ๋ชจ๋ฆฌ ๊ตฌ์ฑ ์์๋ ์ ์ ํ ์คํธ ๋ฐ ์ด์ ํ์ง๋ฅผ ์ํ AI ์๊ณ ๋ฆฌ์ฆ์ ๋์ ์ผ๋ก ์ธํด ์์ฐ ๋ณ๋ชฉ ํ์์ ์ค์๋ค.์ด ํ๋ก์ ํธ์ ๋ ๋ค๋ฅธ ํ์์ ์ธ ์ธก๋ฉด์ ์๋ก์ด ํ๋ก๋ธ ์นด๋ ๋ถ๋ฅ์ฒด์ ์ ๋์ ๊ณผ ํ๋ก๋ธ ์นด๋ ์์ฅ์ ์ฌ์ธ๋ถํ(re-segmentation)์ด๋ค. ์ด ํ์ ์ ์ธ ๋ถ๋ฅ๋ ํ๋ก๋ธ ์นด๋ ๊ธฐ๋ฅ ๋ฐ ์์ฉ ๋ถ์ผ์ ๋ํ ๋ณด๋ค ์ผ๊ด๋ ์ดํด๋ฅผ ์ด์งํ์ฌ ์ฐ์ ํ์ค์ ์ฌ์ ์ํ ๊ฒ์ผ๋ก ๊ธฐ๋๋๋ค. ๊ธ๋ก๋ฒ ํ๋ก๋ธ ์นด๋ ์์ฅ์ด ๋ฐ์ ํ๋ฉฐ ํนํ ํ๊ตญ๊ณผ ์ค๊ตญ์ ์ด์ ์ด ๋ง์ถฐ์ง๊ณ ์๋ค. ์ด ๋ฐ๋์ฒด ๊ฐ๊ตญ๋ค์ ์ง์ญ ์์, ํ์ ๋ฐ ์ ๋ต์ ํ์ ์ผ๋ก ์ธํ ๋ ํนํ ์์ฅ ์ญํ๋ค(dynamics)์ ๋ณด์ฌ์ค๋ค.
์์ฝํ๋ฉด, ๋ณธ ์ฐ๊ตฌ๋ ๋ฐ๋์ฒด ํ ์คํธ๋ฅผ ์ ๋ก ์๋ ์์ค์ผ๋ก ํฅ์ํจ๊ณผ ๊ธ๋ก๋ฒ ํ๋ก๋ธ ์นด๋ ์์ฅ์ ์๋กญ๊ฒ ๋ณํํจ์ ์์ด์ AI์ ํ์์ ์ธ ์ญํ ์ ๊ฐ์กฐํ๋ค.
Panchami Phadke๋ TechInsights์ ์์ฅ ์กฐ์ฌ ๋ถ์๊ฐ์ด๋ค. ๊ทธ๋ ์ ์ฃผ์ ์ ๋ฌธ ๋ถ์ผ๋ ํ๋ก๋ธ ์นด๋, ์์ผ ๋ฐ ์ฅ์น ์ธํฐํ์ด์ค ๋ณด๋์ ๊ฐ์ ํ ์คํธ ์ฐ๊ฒฐ ์์คํ (Test Connectivity System)์ด๋ค. ๊ทธ๋ ์ ์ ๋ฌด์ ์ผ๋ถ๋ ๋ฉ๋ชจ๋ฆฌ ๋ฐ ๋น๋ฉ๋ชจ๋ฆฌ ์์ฅ ๋ชจ๋์์ ๋ฐ๋์ฒด ํ ์คํธ์ ์์ฅ ๋ถ์์ ์ด์ ์ ๋ง์ถ๊ณ ์๋ค.
๊ทธ๋ ๋ ์บ๋ฆฌํฌ๋์ ์ฃผ๋ฆฝ ๋ํ๊ต ์ฑ๋์์ผ๋๋(California State University Channel Islands)์์ ์ํ ์ ๊ณต์ผ๋ก ์์ฌ ํ์๋ฅผ ๋ฐ์๋ค. ๊ทธ๋ ๋ ๋ํ ๋ฒต๊ฐ๋ฃจ๋ฃจ ๋ผ๋ง์ด์ ๊ธฐ์ ์ฐ๊ตฌ์(Ramaiah Institute of Technology)์์ ๊ธ์ต์ ๋ฌธ์์ฌ ํ์(MBA)๋ฅผ ์ทจ๋ํ๋ค. ๊ทธ๋ ๋ Markov Chain๊ณผ Python์ ์ฌ์ฉํ์ฌ ์ฃผ์ ์์ฅ ํธ๋๋๋ฅผ ๋ถ์ํ๊ณ ์์ธกํ๋ ๊ฒ์ ๋ํ ์์ฌ ๋ ผ๋ฌธ์ ๋ฐํํ๋ค. Panchami๋ ๋ํ Indian Research Journal, SAGE Student Research Conference ๋ฑ์ ๋ง์ ํ์ ๋ ผ๋ฌธ์ ๋ฐํํ์ผ๋ฉฐ TestConX China 2022, TestConX 2023 at Mesa, Arizona ๋ฐ SW Test 2023 at Carlsbad, CA์์ ๋ฐํํ๋ค.
![PDF-Icon 150x139](/premium/wp-content/uploads/PDF-Icon-150x139.png)
“ ๋ฒ์ธ(Burn-in)๊ณผ ํ ์คํธ ์์ผ์ ๋ฏธ์น๋ ์์ฅ ๋ํ์ ๊ธฐ์ ํธ๋ ๋”
Abstract - Biography (English)
This presentation covers a lot of ground and provides a quick update of the important changes happening in the world of burn-in and test sockets.
Topics explored on the market side include acquisitions, market drivers, and the regional shifts that are reshaping the industry. From the technology perspective, the presentation explains how advanced packaging, demanding thermal test conditions, and the introduction of data analytics are adding cost and complexity to semiconductor test.
John West is a Senior Director of the Semiconductor Subsystems and Test Division at Yole Group. He has over 20 years of industry experience and a successful track record in various strategy and consulting projects. John has a Bachelor's degree in Medical Physics from King's College London and an MBA from Cranfield School of Management.
์ด๋ก - ์ ๊ธฐ (Korean)
๋ณธ ํ๋ ์ ํ
์ด์
์ ๋ฒ์ธ ๋ฐ ํ
์คํธ ์์ผ ๋ถ์ผ์์ ์ผ์ด๋๊ณ ์๋ ์ค์ํ ๋ณํ์ ๋ํ ๋ง์ ๋ถ๋ถ์ ๋ค๋ฃจ๋ฉฐ ์ต์ ์ ๋ณด๋ฅผ ์๋ ค์ฃผ๊ณ ์๋ค.
์์ฅ ์ธก๋ฉด์์์ ํ๊ตฌ ์ฃผ์ ๋ค์ ์ธ์, ์์ฅ ๋์ธ ๋ฐ ์
๊ณ๋ฅผ ์ฌํธํ๊ณ ์๋ ์ง์ญ์ ๋ณํ๋ฅผ ํฌํจํ๊ณ ์๋ค.
๊ธฐ์ ๊ด์ ์์๋ ์ฒจ๋จ ํจํค์ง, ๊น๋ค๋ก์ด ์ด ํ
์คํธ ์กฐ๊ฑด ๋ฐ ๋ฐ์ดํฐ ๋ถ์ ๋์
์ด ์ด๋ป๊ฒ ๋ฐ๋์ฒด ํ
์คํธ์ ๋น์ฉ๊ณผ ๋ณต์ก์ฑ์ ์ถ๊ฐํ๋์ง ์ค๋ช
ํ๋ค.
John West๋ Yole Group์ Semiconductor Subsystems and Test Division์ Senior Director์ด๋ค.
๊ทธ๋ 20๋
์ด์์ ์
๊ณ ๊ฒฝํ๊ณผ ๋ค์ํ ์ ๋ต ๋ฐ ์ปจ์คํ
ํ๋ก์ ํธ์์ ์ฑ๊ณต์ ์ธ ์ค์ ์ ๋ณด์ ํ๊ณ ์๋ค.
John์ King's College London์์ ์๋ฃ ๋ฌผ๋ฆฌํ ํ์ฌ ํ์๋ฅผ ์ทจ๋ํ์ผ๋ฉฐ Cranfield School of Management์์ MBA๋ฅผ ์ทจ๋ํ๋ค.
![PDF-Icon 150x139](/premium/wp-content/uploads/PDF-Icon-150x139.png)
10:15
Break & Networking
Enjoy time to meet with the presenters and network while refreshments are served.10:45
“์ค์ฅ๊ธฐ Test Cost & Space ์ฆ๊ฐ ๋์์ ์ํ Tester์ ๊ตฌ์กฐ ๋ณ๊ฒฝ ํ์์ฑ”
Abstract (English)
In order to respond to the increasing demand for memory and meet product requirements, the level of technical difficulty required for testers is increasing. As test-related investments and costs are expected to continue to increase, a transition to a new tester structure is necessary to reduce test costs and space. To achieve this, it is necessary to collaborate with ecosystem to find solutions for expected problems in thermal, connector, socket, and board.
์ด๋ก (Korean)
๋ฉ๋ชจ๋ฆฌ์ ์์ ์ฆ๊ฐ์ ๋์ํ๊ณ ์ ํ์ ์๊ตฌ ์ฌ์์ ๋ง์กฑ์ํค๊ธฐ ์ํด Tester์ ์๊ตฌ๋๋ ๊ธฐ์ ๋์ด๋๊ฐ ๋์์ง๊ณ ์์ต๋๋ค. ์ด์ Test ๊ด๋ จ ํฌ์์ ๋น์ฉ์ด ์ง์ ์ฆ๊ฐ๋ ๊ฒ์ผ๋ก ์์๋๋ ๋ฐ, Test Cost์ Space์ ์ ๊ฐ์ ์ํด ์ ๊ท Tester ๊ตฌ์กฐ๋ก ์ ํ์ด ํ์ํฉ๋๋ค. ์ด๋ฅผ ์ํด์๋ Thermal, Connector, Socket ๋ฐ Board์์ ์์๋๋ ๋ฌธ์ ์ ์ ํด๊ฒฐ ๋ฐฉ์์ ํจ๊ป ๋ชจ์ํ ํ์๊ฐ ์์ต๋๋ค.
![PDF-Icon 150x139](/premium/wp-content/uploads/PDF-Icon-150x139.png)
![KH Yu headshot](https://www.testconx.org/premium/wp-content/uploads/2024/KHYu.png)
11:15
“Test Socket์ฉ Contactor์ ์ ๊ธฐ์ ์ฌ์ ํ์คํ: ํ์์ฑ๊ณผ ํ์คํ ๋ฐฉ์ ์ ์”
Abstract - Biography (English)
In this presentation, we discuss various types of contactors used in semiconductor and electronic component test sockets. These contactors come in different shapes and are manufactured through various processes, including the widely used Spring pogo pins, Elastomer, Rigid types, among others. Test engineers in semiconductor and electronic component manufacturing companies select contactor types based on the characteristics of the Device Under Test (DUT), with particular attention to their electrical properties.
The presentation provides examples and explanations of electrical specifications for different contactors. Additionally, we explore the issue of contactor suppliers presenting varying electrical specifications, even when using the same contactor and housing. Through this analysis, we aim to assist test engineers in making more objective decisions when choosing contactors.
Furthermore, we offer examples of how to determine contactor electrical specifications using Spring pogo pins, including empirical measurements and Finite Element Method (FEM) Simulation Tools. This underscores the importance of standardization in measurement and simulation methods, helping test engineers in semiconductor and electronic component manufacturing companies make more precise contactor selections.
Ultimately, this presentation seeks to provide valuable insights and guidance for both test engineers and contactor manufacturers, streamlining the process of determining electrical specifications for contactors.
- TONGMYONG UNIVERSITY, Mechatronics Master(2007)
- PUKYONG NATIONAL UNIVERSITY, Electrical PH.D, Candidate(2009)
- HITACHI DECO, Tester & Handler R&D Engineer(3Y)
- LEENO Inc, Electrical Engineer (12Y)
- Qualmax Testech Inc, Test socket R&D Engineer (10Y)
- Current, ISC Co.,Ltd & Prowell, Test socket R&D Engineer (4Y)
์ด๋ก - ์ ๊ธฐ (Korean)
๋ณธ Presentation์์๋ ๋ฐ๋์ฒด ๋ฐ ์ ์๋ถํ์ฉ Test socket์ ์ฌ์ฉ๋๋ ๋ค์ํ Contactor์ ์ข ๋ฅ์ ๋ํด์ ๋ค๋ฃจ๊ณ ์์ต๋๋ค. ๊ฐ์ฅ ๋ง์ด ์ฌ์ฉ๋๊ณ ์๋ Spring pogo pin์ ๋น๋กฏํ์ฌ Elastomer, Rigid type ๋ฑ์ ํ์๊ณผ ์ ์กฐ๊ณต์ ์ ๋ฐ๋ฅธ ๋ค์ํ ์ข ๋ฅ์ contactor๊ฐ ์ฌ์ฉ๋๊ณ ์์ผ๋ฉฐ, ๋ฐ๋์ฒด ๋ฐ ์ ์๋ถํ์ ์ ์กฐ์ ์ฒด์ Test์์ง๋์ด๋ค์ DUT์ ํน์ฑ์ ๋ฐ๋ผ์ Contactor์ Type๋ฅผ ์ ์ ํ๊ณ ์์ต๋๋ค. ํนํ, ์ ๊ธฐ์ ํน์ฑ์ ๋ฐ๋ผ์๋ ๋์ฑ ์ ์คํ ์ ํ์ด ์ด๋ฃจ์ด์ง๋๋ค.
๋ณธ Presentation์์๋ ๋ค์ํ Contactor์ electrical specification๊ณผ ๊ด๋ จํ์ฌ ์์๋ฅผ ์ ์ํ๊ณ ,๊ฐ Specification์ ์ค๋ช ํฉ๋๋ค. ๋ํ, ๋์ผํ Contactor์ Housing์ ์ฌ์ฉํ๋๋ผ๋ Contactor ๊ณต๊ธ์ฌ๋ค์ด ๋ค๋ฅธ Electrical specification์ ์ ์ํ๋ ๋ฌธ์ ์ ๋ํด ๊ณ ์ฐฐํฉ๋๋ค. ์ด๋ฌํ ๊ณ ์ฐฐ์ ํตํด Test ์์ง๋์ด๊ฐ ๋ณด๋ค ๊ฐ๊ด์ ์ธ ํ๋จ์ผ๋ก Contactor๋ฅผ ์ ํํ ์ ์๋๋ก ๋์์ ์ฃผ๊ณ ์ ํฉ๋๋ค.
๋๋ถ์ด, Spring pogo pin์ ์ค์ธก๊ณผ FEM Simulation Tool์ ํ์ฉํ์ฌ Contactor์ Electrical specification์ ๊ฒฐ์ ํ๋ ๋ฐฉ๋ฒ์ ์์๋ฅผ ์ค๋ช ํฉ๋๋ค. ์ด๋ฅผ ํตํด ์ธก์ ํ์ค ๋๋ ์๋ฎฌ๋ ์ด์ ๋ฐฉ๋ฒ์ ํ์คํ์ ํ์์ฑ์ ์ดํดํ๊ณ , ๋ฐ๋์ฒด ๋ฐ ์ ์๋ถํ ์ ์กฐ์ ์ฒด์ Test ์์ง๋์ด๊ฐ ๋ณด๋ค ์ ํํ๊ฒ Contactor๋ฅผ ์ ํํ ์ ์๋๋ก ๋๊ณ ์ ํฉ๋๋ค. ๋ํ Contactor ์ ์กฐ์ ์ฒด๋ค๋ Electrical specification์ ๊ฒฐ์ ํ ๋ ๊ณ ๋ฏผ์ ๋์ด์ฃผ๋ ํ๋ ์ ํ ์ด์ ์ ๋ชฉํ๋ก ํ๊ณ ์์ต๋๋ค.
- ๋๋ช ๋ํ๊ต ๋ฉ์นดํธ๋ก๋์ค๊ณตํ ์์ฌ(2007),
- ๋ถ๊ฒฝ๋ํ๊ต ์ ๊ธฐ๊ณตํ ๋ฐ์ฌ๊ณผ์ ์๋ฃ(2009)
- HITACHI DECO, Tester & handler ๊ฐ๋ฐ ์์ง๋์ด(3๋ )
- LEENO INC, ์ ์ ์์ง๋์ด(12๋ )
- Qualmax, ๊ฐ๋ฐ ์์ง๋์ด(10๋ )
- ํ์ฌ, ISC & Prowell, Test socket ์ฐ๊ตฌ๊ฐ๋ฐ ์์ง๋์ด(4๋ )
![PDF-Icon 150x139](/premium/wp-content/uploads/PDF-Icon-150x139.png)
“๊ณ ์ฑ๋ฅ ์์ผ์ฉ ๊ธ์์ ์ฐ์ฒ์ด์์ฌ”
Abstract - Biography (English)
The semiconductor test socket is one of the mandatory final processes for achieving a high-quality chip. There are two types of test sockets widely used: pogo pin and silicon rubber sockets. Silicon rubber socket and pogo pin types depend on the desired application target. Pogo pin type is a traditional semiconductor test method that is over 40 years used in this field. This method can flow stable electric current and a relatively good lifecycle. The silicon rubber type is developed with a micro-ball located into the silicon rubber, showing relatively good results in the short high-frequency application field.
Most test socket materials use polymeric and ceramic-based materials. The socket materials have not been very critical even though semiconductor technology is developed faster than the test socket field till now. Thanks to nanotechnology could achieve a highly integrated narrow nanosized circuit design, but it also consumed high power with high thermal concentration. Those issues could cause some side effects of the chips, such as malfunctioning when used. Due to the above reasons, the test socket field could require better-performed socket materials such as a high-power adaptive with good thermal durability.
In this study, we have successfully fabricated the metal insulator transition materials with high thermal and power adaptive semiconductor test socket materials by powder metallurgy process.
Hansang Kwon graduated with BS. and Ms. from the Department of Materials Processing, Pukyong National University in Busan Republic of Korea 2005. He got a Ph.D. from the Department of Materials Processing at Tohoku University in Sendai, Japan 2008.
He worked for The Institute for Solid State Chemistry Bordeaux-National Center for Scientific Research (ICMCB-CNRS, French national lab.) in France as a postdoc in nanocomposites from 2009-2010.
์ด๋ก - ์ ๊ธฐ (Korean)
๋ฐ๋์ฒด ํ ์คํธ ์์ผ์ ๊ณ ํ์ง ์นฉ์ ์ป๊ธฐ ์ํ ์ต์ข ๊ณต์ ์ ์ฌ์ฉ๋๋ ํ์ ์์ฌ๋ถํ์ด๋ค. ์ผ๋ฐ์ ์ผ๋ก ๋๋ฆฌ ์ฌ์ฉ๋๊ณ ์๋ ํ ์คํธ์ฉ ์์ผ ๋ฐฉ์์ ํฌ๊ณ ํ๊ณผ ์ค๋ฆฌ์ฝ ๊ณ ๋ฌด๋ฅผ ํ์ฉํ๋ ํํ์ด๋ฉฐ ์ ์ฉ ๋์์ ๋ฐ๋ผ ๊ฐ๊ฐ์ ๋ฐฉ์์ ์์ผ์ ์ ํ์ ์ผ๋ก ์ฌ์ฉํ ์ ์๋ค. ํฌ๊ณ ํ ๋ฐฉ์์ ๋ฐ๋์ฒด ํ ์คํธ ์์ผ ๋ถ์ผ์์ ์ฝ 40๋ ์ด์ ์ฌ์ฉ๋์ด ์จ ์ ํต์ ์ธ ํ ์คํธ ๋ฐฉ์์ด๋ค. ์ด ๋ฐฉ๋ฒ์ ์์ ์ ์ธ ์ ๋ฅ๋ฅผ ํ๋ฆด ์ ์๊ณ ์๋์ ์ผ๋ก ์์ผ ์๋ช ์ด ๊ธด ์ฅ์ ์ด ์๋ค. ์ค๋ฆฌ์ฝ ๊ณ ๋ฌด ํ์ ์์ผ์ ์ค๋ฆฌ์ฝ ๊ณ ๋ฌด ๋ด๋ถ์ ๋ง์ดํฌ๋ก ๋ณผ์ ์์น์ํจ ํํ๋ก ๊ฐ๋ฐ๋์์ผ๋ฉฐ, ๋จ๊ฑฐ๋ฆฌ ๊ณ ์ฃผํ ์ ์ฉ ๋ถ์ผ์์ ๋น๊ต์ ์ข์ ๊ฒฐ๊ณผ๋ฅผ ๋ณด์ฌ์ฃผ๊ณ ์๊ณ ํ ์คํธ์ค ๋ฐ์๋ ์ ์๋ ์นฉ์ ์์์ ์ต์ํํ ์ ์๋ ์ฅ์ ์ด ์๋ค.
์ต๊ทผ ๋ค์ด ๋๋ ธ๊ธฐ์ ์ ๋ฐ์ ์ผ๋ก ์ข ๋์ ํ๋ก ์ค๊ณ ๋ณด๋ค ๋์ฑ ๋ ๊ณ ์ง์ ์ ์นฉ ์ ์์ด ๊ธฐ๋ฅํด์ง๋ฉด์ ํ ์คํธ ์์ผ ์ญ์ ์๋์ ์ผ๋ก ๋์ ์ด ์ง์ค๋์ ์ ๋ ฅ ์๋น์ ๋ํ ๋์์ด ํ์ํ ์ค์ ์ด๋ค. ์ฆ, ํ ์คํธ ์์ผ ์ญ์ ์ฐ์ํ ์ด์ ๋ด๊ตฌ์ฑ๊ณผ ๊ณ ์ ๋ฅ๋ฑ์ ๋์ ๊ฐ๋ฅํ ์์ผ์ ์ ์ฉ์ด ํ์ํ ๊ฒ์ด๋ค.
๋ณธ ์ฐ๊ตฌ์์๋ ๋ถ๋ง ์ผ๊ธ ๊ณต์ ์ ํตํ์ฌ ๊ณ ๋ฐฉ์ด ๊ธ์ ์ ์ฐ ์์ฌ๋ฅผ ์ ์กฐํ๊ณ ์ด๋ฅผ ๊ธฐ๋ฐ์ผ๋ก ํ ์ฐจ์ธ๋ ๊ณ ์ฑ๋ฅ ๋ฐ๋์ฒด ํ ์คํธ์ฉ ์์ผ์ ์ ์ํ์๋ค. ํนํ ์ ์กฐ๋ ๊ธ์์ ์ฐ์ฒ์ด์์ฌ๋ ํ๋ฉด์ ํญ ์ ์ด๊ฐ ๊ฐ๋ฅํ์ฌ ๋ค์ํ ์์ฌ ๋ถํ์ผ๋ก ์์ฉ์ด ๊ฐ๋ฅํ ๊ฒ์ผ๋ก ๊ธฐ๋๋๋ค.
โ ์ฃผ์ ๊ฒฝ๋ ฅ
โท ใ์์ง์ (Next Generation Materials Co., Ltd.) ๋ํ์ด์ฌโท ๋ถ๊ฒฝ๋ํ๊ต ์ ์์ฌ์์คํ ๊ณตํ๊ณผ ๊ต์
โท ์ค์์ค์ฐ๋ฐฉ์ฌ๋ฃ๊ณผํ๊ธฐ์ ์ฐ๊ตฌ์ ๊ณผํ์
โท ํ๊ตญ์์ฐ๊ธฐ์ ์ฐ๊ตฌ์ ์ ์์ฐ๊ตฌ์
โท ํ๋์ค๊ตญ๋ฆฝ๊ณผํ์ ํฌ์คํฐ ๋ฅํฐ
โท ์ผ๋ณธ Tohoku University ๋ฐ์ฌ
โ ์ฃผ์ ๋์ธ ํ๋
โท(ํ)๊ฒฝ์ฌ๊ธฐ๋ฅ์ฌ๋ฃ ๊ตญ์ ์๋ฌธ์์ (IACFGM)โท(ํ)์ผ๋ณธ์ฐ์ ์ดํฉ๊ธฐ์ ์ฐ๊ตฌ์(AIST) ๋น์์์ฐ๊ตฌ์
โท(ํ)๋ํ๊ธ์์ฌ๋ฃํํ ๋ณตํฉ์ฌ๋ฃ๋ถ๊ณผ์์
โท(ํ)ํ๊ตญ๋ณตํฉ์ฌ๋ฃํํ ์ฌ์ ์ด์ฌ
โท(ํ)ํ๊ตญํ์ํํ ์ข ์ ํ์
![PDF-Icon 150x139](/premium/wp-content/uploads/PDF-Icon-150x139.png)
12:15
Lunch and EXPO
Enjoy the delicious hot buffet lunch and networking time. Then take the time to explore the TestConX EXPO. There will be many great exhibits to connect electronic test professionals to solutions. You will be certain to see something new or meet someone new. As attendees to TestConX know, there is always excellent food, drinks, and time for attendees to network with exhibitors! TestConX EXPO will open at 12:15 and will remain open throughout the afternoon until 18:0013:30
![JiHoon Jang](https://www.testconx.org/premium/wp-content/uploads/2024/JiHoonJang.png)
๊ณ ๋์ ๋ถ์ ์ฒด๊ณ. ๋ฐ๋์ฒด ์์ฅ์ ์ด์ ๋ฉ์ปค๋์ฆ์ด ๋ง๋ค์ด์ ธ ์จ ๊ณผ์ ์ ์ฃผ๋ชฉํ๊ณ , ํจํค์ง ์์ฅ์ ๊ด์ ํฌ์ธํธ๋ค์ ์ง์ด๋ณธ๋ค.
์์ฅ ์ต์ ๋ ฅ ๊ธฐ์ ๋ค์ ๋ํฅ์ ์ค์ฌ์ผ๋ก ์ด๋๋ฐด๋์ค ํจํค์ง ์์ฅ ํํฉ์ ์ ๋ฆฌํ๊ณ ,ย ์ด์ข ๊ตํฉ์ผ๋ก ํฅํด๊ฐ๋ ๋ฐ๋์ฒด ํ๋ซํผ์ ์งํ ์์๊ณผ ์ฅ๊ธฐ์ ์ธ ์์ฌ์ ์ ๊ณ ์ฐฐํด๋ณด๋ ์๊ฐ.
14:15
“์ผํ๋ฌ ์์ผ - ์์ง ์คํฌ๋ฌ๋น ํ ์คํธ ์๋ฃจ์ .”
![PDF-Icon 150x139](/premium/wp-content/uploads/PDF-Icon-150x139.png)
“SiC ๋ฒ์ธ์ ๊ด๋ จ๋ ๋ฌธ์ ์ ๋ค๊ณผ ๋์ ๊ณผ์ ”
Abstract - Biography (English)
Since the development of electronic devices, the world has been undergoing rapid and efficient evolution. Among various fields, a crucial aspect currently facing us is "power semiconductors." SEMICS, as a global semiconductor manufacturing equipment company in Korea, we want to discuss the existing problems and explore potential alternatives within this realm.
Currently, many global power semiconductor chip manufacturers are striving to achieve the demanded level of quality while establishing efficient mass production systems. Our company, SEMICS has put considerable effort into contemplating the value we can provide to our customers and has been working on developing solutions that can meet all requirements. One of the outcomes we are proud of is an efficient and versatile solution for the Wafer Level Burn-In (WLBI) process, which is at least one of the challenges faced by engineers today.
This technology focuses on addressing the issues in the current WLBI process of SiC / GaN wafers and solving associated research tasks through SEMICS' unique approach. We believe you will understand how we can efficiently and accurately measure the status of die and generate valuable data to feedback front SiC wafer process for definitive improvement.
Gabriel Tak, Vice President of Product Marketing, is responsible for all technical marketing and sales activities across all product families at Semics.
Gabriel started his major and career in Electronic Engineering. He holds a bachelorโs degree in electronic engineering from Kyungnam University and international management from HanYang Cyber University. Now he is studying in Marketing & Business management track in Hanyang MBA course.
Gabriel has 17 years of experience in the semiconductor industry holding progressive leadership roles in product marketing. He has joined in Semics in 2007 with starting his career as a system manufacturing & customer support engineer for the first 5 years, and he has an experience at field application engineer for next 5 years. Hobbies include golf, soccer, and scuba diving.
์ด๋ก - ์ ๊ธฐ (Korean)
์ ์ ์ฅ์น์ ๋ฐ์ ์ด๋๋ก ์ธ๊ณ๋ ๋น ๋ฅด๊ณ ํจ์จ์ ์ธ ์งํ๋ฅผ ๊ฑฐ๋ญํ๊ณ ์์ต๋๋ค. ์ฌ๋ฌ ๋ถ์ผ ์ค ํ์ฌ ์ฐ๋ฆฌ ์์ ์ธ์์ง ์ค์ํ ๋ฌธ์ ์ค ํ๋๋ "ํ์ ๋ฐ๋์ฒด"์ ๋๋ค. ํ๊ตญ์ ์์นํ ์ธ๊ณ์ ์ธ ๋ฐ๋์ฒด ์ ์กฐ ์ฅ๋น ํ์ฌ์ธ SEMICS๋ ์ด ๋ถ์ผ์์ ๊ธฐ์กด์ ๋ฌธ์ ์ ๋ค์ ๋ ผ์ํ๊ณ ์ ์ฌ์ ์ธ ๋์๋ค์ ํ์ํ๊ณ ์ ํฉ๋๋ค.
ํ์ฌ ๋ง์ ๊ธ๋ก๋ฒ ํ์ ๋ฐ๋์ฒด ์นฉ ์ ์กฐ์ฌ๋ค์ ์๊ตฌ๋๋ ํ์ง ์์ค์ ๋ฌ์ฑํ๋ฉด์ ํจ์จ์ ์ธ ๋๋ ์์ฐ ์์คํ ์ ๊ตฌ์ถํ๊ธฐ ์ํด ๋ ธ๋ ฅํ๊ณ ์์ต๋๋ค. ์ฐ๋ฆฌ ํ์ฌ SEMICS๋ ๊ณ ๊ฐ์๊ฒ ์ ๊ณตํ ์ ์๋ ๊ฐ์น์ ๋ํด ์ฌ๋ ์๊ฒ ๊ณ ๋ฏผํ๊ณ , ๋ชจ๋ ์๊ตฌ์ฌํญ์ ์ถฉ์กฑ์ํฌ ์ ์๋ ํด๊ฒฐ์ฑ ์ ๊ฐ๋ฐํ๊ธฐ ์ํด ๋ ธ๋ ฅํ๊ณ ์์ต๋๋ค. ๊ทธ ๊ฒฐ๊ณผ๋ก ์ฐ๋ฆฌ๋ ์ค๋๋ ์์ง๋์ด๋ค์ด ์ง๋ฉดํ๋ ์ฌ๋ฌ ๋์ ์ค ํ๋์ธ Wafer Level Burn-In (WLBI) ๊ณผ์ ์ ๋ํ ํจ์จ์ ์ด๊ณ ๋ค์ํ ํด๊ฒฐ์ฑ ์ ๊ฐ๋ฐํ ์ ์์์ต๋๋ค.
์ด ๊ธฐ์ ์ SEMICS์ ๋ ํนํ ๋ฐฉ๋ฒ์ ํตํด SiC / GaN ์จ์ดํผ์ ํ์ฌ WLBI ๊ณผ์ ์์์ ๋ฌธ์ ์ ์ ํด๊ฒฐํ๊ณ ๊ด๋ จ ์ฐ๊ตฌ ๊ณผ์ ๋ฅผ ํด๊ฒฐํ๋ ๋ฐ ์ค์ ์ ๋ก๋๋ค. ์ฐ๋ฆฌ๋ ๋ค์ด์ ์ํ๋ฅผ ํจ์จ์ ์ด๊ณ ์ ํํ๊ฒ ์ธก์ ํ๊ณ SiC ์จ์ดํผ ์ ์กฐ ๊ณต์ ์ ๊ทผ๋ณธ์ ์ธ ๊ฐ์ ์ ์ํด ๊ฐ์น ์๋ ๋ฐ์ดํฐ๋ฅผ ์์ฑํ์ฌ ํผ๋๋ฐฑ ํ๋ ๊ณผ์ ์ ์๋ฆฝ ํจ์ผ๋ก์จ ๋ณด๋ค ๊ทผ๋ณธ์ ์ธ ๊ฐ์ ์ ๋ค๊ฐ๊ฐ ์ ์๋ ๋ฐฉ๋ฒ์ ์ ๊ณต ํ ์ ์๋ค๊ณ ๋ฏฟ์ต๋๋ค.
ํํ์ฃผ ๋ณธ๋ถ์ฅ์ ํ์ฌ ์ด์ฌ๋ก ๊ฒธ์์ ํ๋ฉฐ, ใ์๋ฏน์ค์ ๋ชจ๋ ์ ํ๊ณผ ๊ธฐ์ ๋ง์ผํ ๋ฐ ์์ ํ๋์ ๋ด๋น.
- ๊ฒฝ๋จ ์ ๋ณด ๋ํ๊ต ์ ์๊ณตํ๊ณผ (2007)
- ํ์MBA๊ณผ์ ๋ง์ผํ & ๋น์ฆ๋์ค ๊ฒฝ์ํ ์ ๊ณต (ํ์ฌ)
- ๋ฐ๋์ฒด ์ ํ ๋ง์ผํฐ (17๋ )
- ์์คํ ์ ์กฐ ๋ฐ CS ์์ง๋์ด (5๋ )
![PDF-Icon 150x139](/premium/wp-content/uploads/PDF-Icon-150x139.png)
15:15
Break & Networking
Enjoy time to meet with the presenters and network while refreshments are served.15:45
“์ ๊ฐ๋ ํํผ์น(0.1mm) ๋ฒ์ธ ์์ผ ์๋ฃจ์ ”
Abstract - Biography (English)
Burn-in socket is made by assembling contact pins and housing either manually or automatically. The assembled burn-in socket is then mounted on a PCB by soldering or compression mount. However, current burn-in socket technology hits the wall at about 0.27mm pitch.
New burn-in socket technology is presented for small pitches, up to 0.10mm.
Path to smaller pitch:
Reducing the pitch beyond the present limit requires paradigm shift in the burn-in socket manufacturing process. Traditional burn-in sockets are assembled first with contacts and housing, before mounted to the PCB. For the new burn-in socket, contacts are first soldered to the PCB. Socket housing is then added.
Solder paste is applied to the contact surface before affixing the contact pin to the PCB. Laser bonding will then solder the contacts to the PCB.
Very small pitch can be achieved with this process. The process can be automated, reducing the socket defects and cost.
Benefits of the new burn-in socket solution:
Reduced defect & reduced waste. Traditional burn-in socket would have to be discarded if there is solder bridge (short circuit) or cold solder joint with the PCB during socket assembly. Attaching the contacts to the PCB before adding socket housing allows for pre-inspection and repair of solder bridge and cold solder. Final defect rate can approach zero with the new process.
Saving material. Separator plates are used in traditional burn-in socket, to reduce electrical shorts and ease manufacturability. The new burn-in socket can eliminate the separator plate, to reduce cost. Fast socket deployment. The new burn-in socket system allows new socket development without any high-cost die cast molding. Fast new socket development, without high fixed cost, is possible. A new socket can potentially be made in one day.
YK Lee current is in Okins Electronics BITS Department and is the Head of Laboratory leading Okins Electronics socket development since 2005. His experinece includes Semiconductor Burn-In Socket Development; Semiconductor SSD & Memory Module Socket Development; and High Speed connector Development.
He is a graduate of Mechanical Engineering at INHA University (2004).
์ด๋ก - ์ ๊ธฐ (Korean)
๋ฒ์ธ ์์ผ์ Contact๊ณผ Housing์ ์๋ ๋๋ ์๋์ผ๋ก ์กฐ๋ฆฝํ์ฌ ์ ์กฐ๋๋ฉฐ, ์กฐ๋ฆฝ๋ ๋ฒ์ธ ์์ผ์ ๋ฉ๋ ๋๋ ๋ฉด ์ ์ด ๋ฐฉ์์ ์ํด PCB์ ์ฅ์ฐฉ๋์ง๋ง, ํ์ฌ ๋ฒ์ธ ์์ผ์ ์ฝ 0.27mm pitch๋ก ์ ์ ํ๊ณ์ ๋ถ๋ชํ ์์ต๋๋ค
์ต๋ 0.10mm์ ์์ ํผ์น๋ฅผ ์ํ ์๋ก์ด ๋ฒ์ธ ์์ผ ๊ธฐ์ ์ ์ ์ํฉ๋๋ค
๋ฏธ์ธ pitch์ ์ ์๋ฃจ์
ํ์ฌ์ ํ๊ณ๋ฅผ ๋์ด์๋ ํผ์น๋ฅผ ์ค์ด๊ธฐ ์ํด์๋ ๋ฒ์ธ ์์ผ ์ ์กฐ ํ๋ก์ธ์ค์ ํจ๋ฌ๋ค์ ๋ณํ๊ฐ ํ์ํฉ๋๋ค. ์ ํต์ ์ธ ๋ฒ์ธ ์์ผ์ PCB์ ์ฅ์ฐฉ๋๊ธฐ ์ ์ ๋จผ์ Contact๊ณผ Housing์ผ๋ก ์กฐ๋ฆฝ๋ฉ๋๋ค. ์๋ก์ด ๋ฒ์ธ ์์ผ์ ๊ฒฝ์ฐ Contact์ PCB์ ๋จผ์ ๋ฉ๋๋ ํ์ ์์ผ ํ์ฐ์ง์ด ์ถ๊ฐ ์กฐ๋ฆฝ๋ฉ๋๋ค
Contact์ PCB์ ๋ถ์ฐฉํ๊ธฐ ์ ์ ์ ์ด ํ๋ฉด์ ์๋ ํ์ด์คํธ๋ฅผ ๋ํฌํฉ๋๋ค. ๊ทธ๋ฆฌ๊ณ ๋์ ๋ ์ด์ ๋ณธ๋ฉ์ด ์ ์ด ํ์ PCB์ ๋ฉ๋ํ๊ฒ ๋ฉ๋๋ค
์ด ๊ณต์ ์ผ๋ก ๋ฏธ์ธ ํผ์น์ ๋ฒ์ธ ์์ผ๋ฅผ ์ ์ํ ์ ์์ต๋๋ค. ๊ณต์ ์ ์๋ํํ์ฌ ์์ผ ๋ถ๋ ๋ฐ ๋น์ฉ๊น์ง๋ ์ค์ผ ์ ์์ต๋๋ค.
์๋ก์ด ๋ฒ์ธ ์์ผ ์๋ฃจ์
์ ์ฅ์ :
๋ถ๋ ๊ฐ์ ๋ฐ ํ๊ธฐ๋ฌผ ๊ฐ์. ๊ธฐ์กด ๋ฒ์ธ ์์ผ์ ์์ผ ์กฐ๋ฆฝ ์ PCB์ ์๋ ๋ธ๋ฆฟ์ง(๋จ๋ฝ) ๋๋ ๋๋ฉ์ด ์๋ ๊ฒฝ์ฐ ํ๊ธฐํด์ผ ํฉ๋๋ค. ์ ๊ฐ๋
์ ์ ๋ฐฉ์์ ๋ฐ๋ฅด๋ฉด ์์ผ ํ์ฐ์ง์ ์ถ๊ฐํ๊ธฐ ์ ์ PCB์ ์ปจํํธ๋ฅผ ๋ถ์ฐฉํ๋ฉด ์๋ ๋ธ๋ฆฟ์ง ๋ฐ ๋๋ฉ์ ์ฌ์ ๊ฒ์ฌ ๋ฐ ์๋ฆฌ๊ฐ ๊ฐ๋ฅํฉ๋๋ค. ์ต์ข
๋ถ๋๋ฅ ์ ์๋ก์ด ๊ณต์ ์ผ๋ก โ0โ์ ๊ฐ๊น์์ง ์ ์์ต๋๋ค.
์์ฌ ์ ์ฝ. ์ข
๋์ ๋ฒ์ธ ์์ผ์๋ contact๊ฐ ์ํธ๋ฅผ ์ ๊ฑฐํ๊ณ ์ ์กฐ์ฑ์ ๋์ด๊ธฐ ์ํด ๋ถ๋ฆฌํ(separator)์ ์ฌ์ฉํฉ๋๋ค. ์๋ก์ด ๋ฒ์ธ ์์ผ์ ๋ถ๋ฆฌํ(separator)์ ์ ๊ฑฐํ ์ ์์ด ๋น์ฉ์ ์ ๊ฐํ ์ ์์ต๋๋ค.
๋น ๋ฅธ ์์ผ ์ ๊ฐ. ์๋ก์ด ๋ฒ์ธ ์์ผ ์์คํ
์ ๊ณ ๋น์ฉ์ ์ฌ์ถ ์ฑํ ์์ด ์๋ก์ด ์์ผ ๊ฐ๋ฐ์ ๊ฐ๋ฅํ๊ฒ ํฉ๋๋ค. ๋์ ๊ณ ์ ๋น์ฉ ์์ด ๋น ๋ฅธ ์๋ก์ด ์์ผ ๊ฐ๋ฐ์ด ๊ฐ๋ฅํฉ๋๋ค. ํ๋ฃจ ์์ ์๋ก์ด ์์ผ์ ๋ง๋ค ์ ์๋ค๊ณ ์์ญํฉ๋๋ค
BITS์ฌ์
๋ถ ์ฐ๊ตฌ์์ฅ
์คํจ์ค์ ์
* ์ฝ๋ ฅ
(ํ) ์คํจ์ค์ ์ BITS์ฌ์
๋ถ ์ฐ๊ตฌ์์ฅ
์คํจ์ค์ ์ ์์ผ ๊ฐ๋ฐ ๋ด๋น (2005 ~ )
์ธํ๋ํ๊ต ๊ธฐ๊ณ๊ณตํ๊ณผ ์กธ์ (2004)
* ์ ๋ฌด ๋ถ์ผ
- ๋ฐ๋์ฒด Burn-In Socket ๊ฐ๋ฐ
- ๋ฐ๋์ฒด SSD, Memory Module ์์ผ ๊ฐ๋ฐ
- High Speed connector ๊ฐ๋ฐ
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“Ceramic mold ์ ์ฉ MEMS process ๊ธฐ๋ฐ์ ์ฐจ์ธ๋ ๋ฐ๋์ฒด ์ ํ๊ณต์ ๊ฒ์ฌ์ฉ MEMS ํต์ฌ ๋ถํ ๊ฐ๋ฐ”
Abstract - Biography (English)
As the increasing a requirement of artificial intelligence (AI) and a huge of data, the process chips, such as processor, memory, and integrated circuits (ICs), became a higher level of integration. And it has faced demand on enhanced specifications โ a higher process speed, a more compact size, etc.
The probe needles for the wafer test and the socket for package test are challenge points to meet functions โ more delicate design and faster data gathering speed between the package and the system board in the narrow pad pitches.
The differentiated ceramic mold which is capable of precise anisotropic etching can used as a mold for fabricating probe needles. By applying this new material to MEMS technology, precise shapes (e.g spring shapes) even with very narrow gaps can be manufactured vertically straight with desired thickness(~130um).
We would like to introduce new MEMS technology for fabricating precise metal parts such as fine-pitch wafer test probe needles and differentiated spring pins for package test which can respond to the demand for next generation semiconductor inspection.
Seung-ho Park is a Material Engineer from point engineering, and he has been in Point engineering for 21 years as a head of R&D department of Point Engineering. He is pioneer for development of the PEC ceramic mold applicated MEMS process and invention of new products which can apply this new technology. SH Park received Ph.D., Master, BS degrees from the department of Materials & Metallurgical Engineering at Inha university in Korea.
์ด๋ก - ์ ๊ธฐ (Korean)
์ ์ฐจ ์ธ๊ณต์ง๋ฅ(AI)์ด ์ผ์ํ๋๊ณ ๋ฐ์ดํฐ์ ๊ท๋ชจ๊ฐ ์ฆ๊ฐ๋๋ฉฐ 5G ํต์ ์ ํตํ ์ค๋งํธํฐ, ์ฌ๋ฌผ์ธํฐ๋ท, ์ ๊ธฐ์ฐจ ๋ฑ์ ์ปดํจํ
์ด ์ผ์์ ์ ์ฉ๋๋ ๋ฒ์๊ฐ ๋์ด์ง๊ณ ์๋ค. ์ด์ ๋ฐ๋ฅธ ๋ฐ๋์ฒด์ ์์์ ๋น ๋ฅธ ์ฒ๋ฆฌ์๋ ์ฑ๋ฅ ์๊ตฌ๊ฐ ์ ์ฐจ ๋์์ง๊ณ ์๋ค. ๋ฐ๋์ฒด ๊ธฐ์ ์ค ์ค๊ณ์ ์ ์กฐ๊ธฐ์ ์ด ์ค์ํ์ง๋ง ์ด๋ฅผ ์ ๋ฐํ๊ฒ ํ์ธํ๊ณ ๊ฒ์ฌํ๋ ๊ธฐ์ ์ด ๋ณด์๋์ง ์์ผ๋ฉด ๋ฐ๋์ฒด ์์ฑํ ์ ์์ด ์ด๋ ต๋ค. ์ฐจ์ธ๋ ๋ฐ๋์ฒด๋ฅผ ํ๋ณดํ๊ธฐ ์ํด์๋ ์ ์ฐจ ๋ฐฐ์ ์ ๋ฐ์ง๋์ ํฌ๊ธฐ๊ฐ ์์์ง๋ ๋ฐ๋์ฒด ๊ฒ์ฌ๊ธฐ์ ๋ ์ด์ ๋ถํฉํ๋ ๊ธฐ์ ๊ฐ๋ฐ์ด ํ์ํ ์ํฉ์ด๋ค.
๋ฐ๋์ฒด ๊ฒ์ฌ์์ ๋ฐ๋์ฒด ํจ๋์ ์ง์ ์ ๊ธฐ์ ์ผ๋ก ์ฐ๊ฒฐํ๋ ํ๋ก๋ธ ํ(probe pin), ๊ทธ๋ฆฌ๊ณ ๋ฐ๋์ฒด ํจํค์ง๋ฅผ ๊ฒ์ฌํ๊ธฐ ์ํ ์์ผ(socket)์ ์ ์ฐจ ํํผ์น๋ก ์์์ง๋ฉด์ ์ ๋ฐํด์ง๊ณ ๊ณ ์จ ๋ฐ ๊ณ ์ฃผํ ํ๊ฒฝ์ ์ ๋ขฐ์ฑ ํน์ฑ์ด ์๊ตฌ๋๊ณ ์๋ค.
์ด๋ฌํ ์ฐจ์ธ๋ ๋ฐ๋์ฒด ์ ์กฐ๋ฅผ ์ํ ๊ฒ์ฌ์ ํต์ฌ๋ถํ์ธ ํ๋ก๋ธ ํ๊ณผ ์์ผ ์ ์์ ๊ธฐ์กด PR(photo-register)์ ์ด์ฉํ ๋๊ธ๊ณต์ ์ผ๋ก ์ ์ํ์์ผ๋ ์ ๋ฐํ๊ณ ๊ณ ์ข
ํก๋น์ ํ ์ ์์ ํ๊ณ๊ฐ ์๋ค.
PEC์ ์ฐจ๋ณํ๋ Ceramic mold๋ ์ ๋ฐํ ์ด๋ฐฉ์ฑ ์์นญ์ด ๊ฐ๋ฅํ ์์ฌ๋ก ๊ธฐ์กด PR์ ๋จ์ ์ ๋ณด์ํ๊ณ ์ ๋ฐํ ํ ์ ์์ด ๊ฐ๋ฅํ๋ค. ์ด๋ฌํ ์์ฌ๋ฅผ ์ด์ฉํ ์ ๋ฐ ๊ธ์ ๋ถํ์ ์ ์ ๊ธฐ์ ๊ณผ ์ฑ๋ฅ์ ํตํด ์ฐจ์ธ๋ ๋ฐ๋์ฒด ๊ฒ์ฌ์ ๋์ ๊ฐ๋ฅํ ํต์ฌ๋ถํ ์ ์กฐ ๊ธฐ์ ์ ์ ์ํ๊ณ ์ ํ๋ค.
๋ฐ์นํธ ์ฐ๊ตฌ์์ฅ์ ๊ธ์๊ณตํ ์์ง๋์ด์ด์ ํฌ์ธํธ์์ง๋์ด๋ง์ R&D ๋ถ๋ถ์ ์ฐ๊ตฌ์์ฅ์ผ๋ก ์ฝ 21๋ ๊ฐ์ ์กฐ์ง์ ์ด๋ ๊ฒฝ๋ ฅ์ ๋ณด์ ํ๊ณ ์์ต๋๋ค. ํฌ์ธํธ์์ง๋์ด๋ง์์ Ceramic mold์ ํน์ฑ ๋ฐ ์ ์กฐ์ ๋ํ ์ง์์ ์ธ ์ฐ๊ตฌ๋ก ํด๋น material๋ฅผ ํ์ฉํ MEMS ๊ณต์ ์ ๊ฐ๋ฐํ ์ฃผ์ ์ฐ๊ตฌ์์ด๋ฉฐ, ํด๋น ๊ธฐ์ ์ ์ ์ฉํ ๋ค์ํ ๋ฏธ์ธ ๋ถํ์ ๊ฐ๋ฐํ๊ณ ์ ์กฐ ๊ณต์ ์ ์๋ฆฝํ์์ต๋๋ค. ๋ฐ์นํธ ์ฐ๊ตฌ์์ฅ์ ์ธํ๋ํ๊ต ๊ธ์๊ณตํ ๋ถ์ผ์ ํ์ฌ, ์์ฌ, ๋ฐ์ฌ ํ์๋ฅผ ๋ณด์ ํ๊ณ ์์ต๋๋ค.
![PDF-Icon 150x139](/premium/wp-content/uploads/PDF-Icon-150x139.png)
“์ AI ์ถ์ถ๊ธฐ”
Abstract - Biography (English)
The presentation introduces Schematic AI Extractor and how it assists the reviewer in reviewing and mining the data from schematic file. A schematic file usually contains lots of interfaces such as audio, display, memory, and so on. For each interface, there are details such as vendor, part number, voltage, technology type, and so on to be extracted. The Schematic AI Extractor can reduce some of the manual labour from the reviewer. The Schematic AI Extractor provides automatic extraction along with AI to interpret the extracted data of the components. Next, the details will filter using a similarity checking character by character with a threshold value method and a master list that contains details of the components. Once everything is passed, will be exported to a custom Excel sheet used by the reviewer.
Angie See Tien Ng is an AI Principal Engineer from Intel, who is the pioneer for Cloud based Remote Debug (CBRD), and spearheaded AI Chat bot. She has been in Intel for 14 years and in the industry for 26 years. Her career includes AI, R&D electronics design, RF designer, FPGA IC characterization, Electrical Validation, Functional Safety etc. Angie is always passionate in innovation and is honoured with Distinguished Invention Award by Intel. She graduated from Campbell University with BEng in Microelectronics/Physics in 1997, obtained her Master in Engineering from Multimedia University in 2014 and completed her PHD doctorate from University Science Malaysia in 2021 in area of designing Cloud-based virtual learning & testing for industry.
Yen Ming Siaw is a Cloud Application Engineer from Intel who is leading the Intel Penang Site Developer Cloud and involved in various AI initiatives including the AI Virtual Chat Bot. He has been in Intel for 8 years and in the industry for 10 years. (Motorola, Intel). His career includes Technical Support, Design & Electrical Validation, Firmware Validation and Software Development. He graduated from University of Bradford UK with BEng in Electrical and Electronics Engineering in 2013.
์ด๋ก - ์ ๊ธฐ (Korean)
ํด๋น ๋ฐํ์์๋ ๋์ AI ์ถ์ถ๊ธฐ ๋ฐ ํด๋น ๊ธฐ์ ์ด ์ด๋ป๊ฒ ๊ฒํ ์๊ฐ ํ๋ก๋ ํ์ผ์ ๋ฐ์ดํฐ๋ฅผ ๊ฒํ ํ๊ณ ๋ง์ด๋ํ๋๋ฐ ๋์์ ์ฃผ๋์ง ์๊ฐํฉ๋๋ค. ํ๋ก๋ ํ์ผ์ ์ผ๋ฐ์ ์ผ๋ก ์ค๋์ค, ๋์คํ๋ ์ด, ๋ฉ๋ชจ๋ฆฌ ๋ฑ ๋ค์ํ interface๋ฅผ ํฌํจํ๋ฉฐ, ๊ฐ interface๋ง๋ค ๊ณต๊ธ์ ์ฒด, ๋ถํ ๋ฒํธ, ์ ์, ๊ธฐ์ ์ ํ ๋ฑ ์ถ์ถํ ์ธ๋ถ ์ ๋ณด๊ฐ ์กด์ฌํฉ๋๋ค. ๋์ AI ์ถ์ถ๊ธฐ๋ AI์ ํจ๊ป ๊ฐ ์์์ ๋ํ ์ ๋ณด๋ฅผ ์๋์ผ๋ก ์ถ์ถํ๋ฉฐ ์ถ์ถ๋ ๊ตฌ์ฑ์์์ ๋ํ ํด์์ ์ ๊ณตํ์ฌ ๊ฒํ ์์ ์์์ ์ ์ค์ผ ์ ์์ต๋๋ค. ๋ค์์ผ๋ก, ์ธ๋ถ ์ ๋ณด๋ threshold value method ๋ฐ ๊ตฌ์ฑ์์์ ๋ํ ์ธ๋ถ ์ ๋ณด๊ฐ ํฌํจ๋ master list๋ฅผ ๊ธฐ๋ฐ์ผ๋ก ๋ฌธ์ ๋ณ ์ ์ฌ์ฑ ๊ฒ์ฌ๋ฅผ ์ฌ์ฉํ์ฌ ํํฐ๋ง ๋ฉ๋๋ค. ๋ชจ๋ ๊ฒ์ด ํต๊ณผ๋๋ฉด, ๊ฒํ ์๊ฐ ์ฌ์ฉํ๋ ์ฌ์ฉ์ ์ ์ Excel sheet๋ก ์ ๋ณด๊ฐ ๋ด๋ณด๋ด์ง๋๋ค.
Angie See Tien Ng ๋ Intel์ AI ์์ ์์ง๋์ด๋ก ํด๋ผ์ฐ๋ ๊ธฐ๋ฐ ์๊ฒฉ Debug(CBRD) ๋ฐ AI์ฑ๋ด ๊ฐ๋ฐ์ ์ฃผ๋ํ์์ต๋๋ค. Dr.Angie๋ Intel ๋ด 14๋
์ ๊ฒฝ๋ ฅ์ ํฌํจํ์ฌ ํด๋น industry์์ ์ด 26๋
์ ๊ฒฝ๋ ฅ์ ๊ฐ์ง๊ณ ์์ผ๋ฉฐ, AI, R&D electronics ๋ฐ RF ์ค๊ณ, FPGA IC characterization, Electrical Validation, Functional Safety ๋ถ์ผ์์ ๊ฒฝ๋ ฅ์ ํฌํจํฉ๋๋ค. Dr.Angie๋ ํ์ ์ ์ด์ ์ ์ธ Engineer๋ก Intel์์ Distinguished Invention Award๋ฅผ ์์ํ ์ด๋ ฅ์ด ์์ต๋๋ค.
Angie๋ 1997๋
Campbell University๋ด ๋ง์ดํฌ๋ก์ ์๊ณตํ/๋ฌผ๋ฆฌํ ํ์ฌ ํ์, 2014๋
Multimedia University ๋ด ๊ณตํ ์์ฌ ํ์, 2021๋
University Science Malaysia์์ ํด๋ผ์ฐ๋ ๊ธฐ๋ฐ virtual learning & testing ์ค๊ณ ๋ถ์ผ์์ ๋ฐ์ฌ ํ์๋ฅผ ์ทจ๋ํ์์ต๋๋ค.
Siaw Yen Ming ๋ Intel์ Cloud Application ์์ง๋์ด๋ก Intel Penang site Developer Cloud๋ฅผ ์ฃผ๋ํ์์ผ๋ฉฐ, AI ๊ฐ์ ์ฑ๋ด ๊ฐ๋ฐ์ ๋น๋กฏํ ๋ค์ํ AI initiative์ ์ฐธ์ฌํ๊ณ ์์ต๋๋ค. Intel ๋ด 8๋
์ ๊ฒฝ๋ ฅ์ ํฌํจํ์ฌ ํด๋น industry์์ ์ด 10๋
(Motorola, intel)์ ๊ฐ์ง๊ณ ์์ผ๋ฉฐ, ๊ธฐ์ ์ง์, ์ค๊ณ ๋ฐ Electrical Validation, Firmware Validation, ๋ฐ Software ๊ฐ๋ฐ ๋ถ์ผ์์์ ๊ฒฝ๋ ฅ์ ํฌํจํฉ๋๋ค.
Siaw๋ 2013๋
University of Bradford UK ๋ด ์ ๊ธฐ์ ์๊ณตํ ๋ถ์ผ ํ์ฌ ํ์๋ฅผ ์ทจ๋ํ์์ต๋๋ค.
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17:15
Lucky Draw
Door prizes for randomly selected attendees(Must be present to win / void where prohibited)