With the rapid development of the semiconductor industry, the volume of data generated during the mass production process has increased dramatically, providing a rich source of information for semiconductor testing. This paper proposes an analytical method based on Gubo OneData big data system to mine and analyze the vast amount of semiconductor testing data to discover potential correlations between different testing phases. By constructing advanced data mining algorithms, this study is able to identify key test items affecting the performance of semiconductor products and further evaluate the interrelationships among these test items. The results show that by optimizing the testing process and eliminating redundant or inefficient test items, production costs can be significantly reduced while ensuring product quality. This paper details the entire process of data collection, preprocessing, feature selection, model construction, and validation, and presents practical application cases, proving the effectiveness and feasibility of the method in actual production environments. Ultimately, this study provides a new cost optimization strategy for the semiconductor industry, which helps to promote technological progress and economic benefits in the industry.

Keywords: Semiconductor Testing; Big Data Analysis; Data Mining; Cost Optimization; Correlation Analysis

Lisi Ma as one of the core team members of Gubo Technologies, Lisi Ma is currently in charge of the Product Management and Design Team. His expertise and domain of responsibilities extend to areas including testing and automation, data analysis, and the product definition of enterprise-level R&D product management platforms. He leads the team in conducting multiple in-depth collaborations with top-tier design companies in China.

随着半导体行业的快速发展，大规模生产过程中产生的数据量急剧增加，为半导体测试提供了丰富的信息资源。本文提出了一种基于孤波OneData大数据系统的分析方法，旨在通过挖掘和分析海量半导体测试数据，发现不同测试阶段之间的潜在相关性。通过构建先进的数据挖掘算法，本研究能够识别出影响半导体产品性能的关键测试项目，并进一步评估这些测试项目之间的相互关系。研究结果表明，通过优化测试流程，剔除冗余或低效的测试项目，可以显著降低生产成本，同时保证产品质量。本论文详细介绍了数据收集、预处理、特征选择、模型构建和验证的全过程，并展示了实际应用案例，证明了该方法在实际生产环境中的有效性和可行性。最终，本研究为半导体行业提供了一种新的成本优化策略，有助于推动行业的技术进步和经济效益的提升。

关键词：半导体测试；大数据分析；数据挖掘；成本优化；相关性分析

马力斯作为上海孤波科技有限公司的核心团队成员之一，目前负责产品管理与设计团队。他的专业领域包括测试与自动化、数据分析以及企业级研发产品管理平台的产品定义。他带领团队与国内一线设计公司进行多个深度合作。

According to the Yole 2023 report, the production value of silicon-based biomedical chips is expected to reach US$900 million by 2027. After the outbreak of COVID-19, many medical institutions found that traditional PCR testing was too slow. The need for fast detection led many companies to invest in the development of new types of BioMEMS. MEMS technology can reduce the size of BioMEMS chips and integrate microfluidic systems. The microstructure on BioMEMS can effectively reduce the usage of reagents. The testing requires only a small amount of sample, reagent, and testing time to obtain results. On the other hand, even with the strong performance of BioMEMS, due to the lack of mature mass production testing technologies, the low coverage rate of mass production testing causes the BioMEMS production capacity to be unable to increase.

This study developed a wet testing platform for BioMEMS chips and achieved stable and highly reproducible measurement results. BioMEMS chips require additional wet testing to verify product yield. In the wet testing process, the test solution is dispensed onto the sensing area of the chip test key, the Kelvin pin makes contact with the pad, and then electrical testing can commence. In addition, due to the restriction of the structure and size of the BioMEMS chip, the volume of the solution to be tested must be controlled within a micro volume of 1 μl. Based on the above situations, this study developed the wet testing platform according to the droplet testing method used in the past. The wet testing platform integrates and optimizes the probe station, semiconductor analyzer, and microfluidic control system. The testing method also verified the influencing factors such as solution concentration, different solutions, cleaning methods, testing time, and needle force, and used the experimental results to improve the testing process. Additionally, this study developed a water-retaining shield method for long-term testing. The shield prevents test sample evaporation and environmental effects. In long-term testing, the shield prolonged the testing time and stabilized the measurement data. This testing platform and process were also verified with the BioMEMS chips, and the measurement data of electrical properties not only showed accuracy but also reproducibility. In summary, the developed wet testing platform can provide reliable electrical measurement capability and has the potential to be developed into a semi-automatic and fully automatic testing platform. The technology is expected to be applied in the field of contract manufacturing testing in the future.

Po-Ting Lai joined King Yuan Electronics in 2018 and is currently a staff engineer in the Advanced Test Development & Application division.

Over the past seven years, his work specifically focusing on developing mass production testing technologies for bioMEMS and microfluidic chips.

In recent years, his team has presented their research findings at the 2020 ITC-Asia, 2023 ITC-Asia, and 2024 ICSS conferences, and has been awarded several invention patents.

生物微机电(BioMEMS)在生医芯片中是个发展迅速的领域，根据2023的产业报告，生医芯片的产值在2027预计将达到9亿美元。此外在新冠疫情爆发后，让医学单位发现传统PCR的速度太慢，故许多企业与实验室皆投入新型生物微机电的开发。微机电技术可以减小芯片的尺寸，并集成微流控技术。芯片上的微结构可以有效减少试剂的用量，检测只需要少量的样品、试剂及测试时间便能够得到结果。另一方面尽管生物微机电芯片具有出色的性能，但由于缺乏成熟的大规模量产测试技术，导致量产测试覆盖率低迷，使得终端产能无法提升。

此次的研究，我们根据客户的生物微机电芯片开发了一个手动测试平台，并实现了稳定且高度可重复的量测结果。许多生物微机电芯片需要额外的湿测试(wet testing)来验证产品的良率。在湿测试过程中，测试溶液会滴到芯片测试键(chip test key)的感测区域，并在测试键上的芯片座(chip pad)扎针(probing)后才能进行电性测试。由于此芯片的结构尺寸反应区域与芯片座距离太短，使待测液的体积受限，必须控制在1微升以内的微体积。基于上述状况，此研究根据过去的滴珠测试方法开发了具自动化潜力的湿测试平台。此湿测试平台整合与优化了探针台、半导体分析仪、微流体控制系统。测试方法同时对各待测液浓度、种类、待测液清洁方法、测试时间、下针力道等影响因子进行验证，并利用实验结果完成测试流程的改善。此外用于长期量测，本研究开发了一种挡水墙屏蔽方法。这种屏蔽能防止测试样品受到环境影响而蒸发。在长期测试中，屏蔽能延长测试时间并使测量数据更加稳定。该测试平台和流程也在客户的生物微机电芯片上进行了验证，电性测量数据不仅显示了其准确性，还展示了其可重复性，其成果也受到客户的肯定。总而言之，开发的湿测试平台具备可靠的电性测量能力，并有潜力发展成为半自动和全自动测试平台。预计该技术未来可应用于代工量产测试领域。

賴柏廷于2018加入京元电子，现在于尖端测试技术开发处担任资深工程师，

这七年主要专注于生物微機電与微流道芯片，目标是开发相关产品的量产测试技术，

其团队近年的研究成果已成功于2020 ITC-Asia、2023 ITC-Asia、2024 ICSS进行发表，并获得数个专利

The compute power of stationary Small Form Factor (SFF) systems, such as desktops or Internet-of-Things (IOT) edge devices, are often thermally limited by the constrained space which makes it a challenge to support the Processor Base Power (also known as Thermal Design Power, i.e. TDP). While customers want to take full advantage of Intel processors with turbo performance, it is even more incredibly challenging to meet the additional thermal requirements by using traditional air-cooling technology in SFF systems. What adds to the pain point is that the system often operates in high operating ambient temperature (in the range of 50-60°C) for IOT applications.

Liquid immersion cooling is one of the most recent innovative technologies in which electronic systems are submerged in a non-conductive liquid bath to allow much more effective cooling. While it is commonly deployed for heat-intensive large-scale servers, we are taking proactive measures to perform sensitivity study to miniaturize immersion cooling to a desktop-tower-size system. The goal of this study is to achieve the smallest possible tower size with the targeted power dissipation. We will demonstrate the proof-of-concept (POC) system equipped with single phase liquid immersion cooling and measure the temperature on the dummy heater units, which mimic an Intel processor and a discrete graphic component. A series of parametric studies were performed to optimize the system in order to achieve the targeted power dissipation.

This paper presents the optimization approach and the components that were changed to arrive at the final POC. The POC that we present in this study measures 160mm (W) x 405mm (H) x 300mm (L) with volumetric size approximately 19.4L. The combined total power dissipation from the heaters is 650W. This POC is the smallest form factor that we can achieve based on the design requirements we have set forth. We believe this concept study with immersion liquid cooling can be scaled to Intel high performance processors with a discrete graphics card which brings the next level of user experience in the desktop, IOT, and workstation user space.

Khai Ern is currently the Platform Architect in the CCG-Malaysia Client Customer Engineering team at Intel. His experience spans multiple computing segments, from tablets and laptops to desktop PCs. He was part of the pioneering team that created the Intel Compute Stick and the first Intel Dual Screen Device Proof-of-Concept prototype, which eventually became successful customer products. His current focus is on defining the system architecture for the next generation of laptop systems, where he collaborates with PC industry players to advance the compute user experience. He is an active technical paper writer with over 30 publications and presentations at technical conferences, where he has received multiple best paper awards.

Johnson Tao is a senior system architect engineer from Client Computing Group(CCG) based in Shanghai PRC.

He is responsible for the intel platform customer enabling and innovation for customer feature landing. Johnson joined Intel in 2011. He received his EE bachelor degree from Nanjing university China, master Degree of EEE from Nanyang technological university Singapore

固定式小型机箱（SFF）系统，如台式电脑或物联网（IOT）边缘设备的计算能力，往往因空间受限而在热量上达到极限，这使得支持处理器基础功率（也称为热设计功率，即TDP）成为一项挑战。尽管客户希望充分利用英特尔处理器的高频性能，但在SFF系统中使用传统的空气冷却技术来满足额外的热量要求则更加具有挑战性。痛点在于，系统常常在高环境温度下运行（物联网应用的温度范围在50-60°C），这进一步增加了难度。

液体浸没冷却是一种最新的创新技术，电子系统被浸入非导电液体中，以实现更有效的冷却。虽然这种技术通常用于热量密集的大型服务器，但我们采取积极措施，进行敏感性研究，以将浸没冷却技术缩小到台式机塔式系统。这项研究的目标是实现尽可能小的塔式机箱尺寸，同时达到目标的功率耗散。我们将展示配备液体浸没冷却的概念验证（POC）系统，并测量模拟英特尔处理器和独立图形处理器的负载单元的温度。我们进行了一系列参数研究，以优化系统，达到目标的功率。

本文介绍了优化方法和为达到最终POC而更改的组件。我们在这项研究中展示的POC尺寸为160mm（宽）x 405mm（高）x 300mm（长），体积大约为19.4L。来自加热器的总功率耗散为650W。这个POC是我们基于我们设定的设计要求所能实现的最小形式机箱。我们相信，这项带有浸没液体冷却的概念研究可以扩展到英特尔高性能处理器和独立显卡，为台式机、IOT和工作站用户带来下一级别的用户体验。

陶剑诚，英特尔亚太研发有限公司（上海）系统设计架构师。2011年加入英特尔计算与客户集团，主要负责大中国区计算机客户支持，研发与创新功能落地。陶剑诚本科毕业于南京大学，研究生毕业于新加坡南洋理工大学。

In the dynamic and competitive semiconductor industry, optimizing test equipment throughput and managing thermal performance are essential for efficiency and productivity. However, predicting automation throughput and thermal behavior remains a complex task. This presentation explores how simulation can transform the prediction of both automation throughput and thermal performance for semiconductor test equipment.

By using simulation, we can create virtual models that replicate real-world semiconductor testing conditions. This discussion will cover how simulation allows us to model the intricate interactions between equipment modules, processes, resources, and thermal dynamics, enabling accurate forecasts of both performance and thermal characteristics. We will also delve into the benefits of using simulation, such as optimizing equipment utilization and power loads. By modeling the automation process flow, potential bottlenecks and inefficiencies can be identified, allowing for proactive adjustments and continuous improvement.

This presentation will provide detailed examples of how thermal simulation can be leveraged to enhance the design of thermal solutions, effectively addressing challenging thermal issues in semiconductor testing. We will explore specific cases where thermal simulation has been used to identify and mitigate thermal challenges during testing, such as thermal hotspots and thermal gradients.

Key Takeaways:

• Understanding the role of simulation in predicting automation throughput and thermal performance for semiconductor test equipment.
• Examples of simulation optimizing equipment utilization and predicting thermal behavior of a DUT.
• Benefits of using simulation, including optimized resource utilization, reduced cycle times, improved equipment efficiency, and thermal load management.
• The role of simulation in scenario analysis and data-driven decision-making for continuous improvement.
• Strategies for leveraging simulation to drive efficiency and gain a competitive edge in the semiconductor industry.

Sid Chan obtained his MSc of Mechanical Engineering from the Sheffield Hallam University, UK.

Sid Chan currently leads the product development team in AEM Singapore to develop new technology for semiconductor test handling. The focus area includes automation, thermal control solution, and tester integration.

在充满活力和竞争的半导体行业中，优化测试设备吞吐量和管理热性能对于效率和生产力至关重要。然而，预测自动化吞吐量和热管理仍然是一项复杂的任务。本演示探讨了仿真如何改变半导体测试设备的自动化吞吐量和热性能预测。

通过使用仿真，我们可以创建真实半导体测试条件的虚拟模型。本次讨论将介绍仿真如何让我们对设备模块、流程、资源和热动力学之间的复杂交互进行建模，从而准确预测性能和热特性。我们还将深入研究使用仿真的好处，例如优化设备利用率和电力负载。通过对自动化流程进行建模，可以识别潜在的瓶颈和低效率，从而允许主动调整和持续改进。

本演示将提供详细的示例，说明如何利用热仿真来增强热解决方案的设计，从而有效解决半导体测试中具有挑战性的热量问题。我们将探讨使用热量仿真来识别和缓解测试过程中的热挑战的具体案例，例如热点和热梯度。

关键要点：

• 了解仿真在预测半导体测试设备的自动化吞吐量和热性能方面的作用。
• 模拟优化设备利用率和预测 DUT 的热行为的示例。
• 使用仿真的好处，包括优化资源利用率、缩短周期时间、提高设备效率和热负荷管理。
• 模拟在情景分析和数据驱动决策中的作用，以实现持续改进。
• 利用仿真提高效率并在半导体行业获得竞争优势的策略。

Sid Chan 毕业于英国谢菲尔德哈勒姆大学，并获颁机械工程硕士学位。